NGI Navigator (Prototype)

VexiiRiscv

active Open Source MIT

An in-order FPGA softcore processor, representing the next generation of the VexRiscv design, implemented in SpinalHDL.

🌐 Website github.com/SpinalHDL/VexiiRiscv 📦 Source Code github.com/SpinalHDL/VexiiRiscv

Product Information

Maintainer
SpinalHDL company
License
MIT
Last Activity
2026-02-11
Categories
Hardware & Manufacturing

Linked NGI Projects

This product was created or improved through NGI-funded projects

VexiiRiscv ngi zero core

Next generation of the VexRiscv in-order FPGA softcore

Often Used Together

Products commonly used alongside VexiiRiscv

OpenAirInterface OSS Open Politics OSS Aerogramme OSS OpenHarbors OSS desec-ns OSS Okular OSS

Similar Products

Other products in related categories

aalt

Accelerated Analog Layout Tool

OSS maintained
openwifi

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software

OSS active
Amaranth HDL

A Python-based hardware description language for designing FPGAs and ASICs

OSS
PDKMaster

An open-source hardware component library for analog/mixed-signal ASIC design, providing tools and r...

OSS

Community Discussion 3 comments

TH
Thomas Hansen 3 days ago

Lorem ipsum dolor sit amet, consectetur adipiscing elit. Praesent commodo cursus magna, vel scelerisque nisl consectetur et.

LM
Laura Martin 1 week ago

Nullam quis risus eget urna mollis ornare vel eu leo. Cras mattis consectetur purus sit amet fermentum.

PG
Paolo Gianetti 2 weeks ago

Maecenas sed diam eget risus varius blandit sit amet non magna. Integer posuere erat a ante venenatis dapibus posuere velit aliquet.

Discovery info: llm_confidence=high; VexiiRiscv is a specific, identifiable software product (an FPGA softcore) with a clear name, description, and public source repository, indicating it is a concrete software implementation rather than just research. Last checked: 2026-02-11